Resumo do Produto

Número da peça
74HC107PW,112
Fabricante
Nexperia
Categoria de Produto
Sandálias de dedo
Descrição
Flip Flops DUAL J-K W/NEG-EDGE

Documentos e mídia

Folhas de dados
74HC107PW,112

Atributos do produto

High Level Output Current :
- 5.2 mA
Input Type :
Single-Ended
Logic Family :
HC
Logic Type :
J-K Negative Edge Triggered Flip-Flop
Low Level Output Current :
5.2 mA
Maximum Operating Temperature :
+ 125 C
Minimum Operating Temperature :
- 40 C
Mounting Style :
SMD/SMT
Number of Circuits :
2
Output Type :
Differential
Package / Case :
TSSOP-14
Packaging :
Tube
Polarity :
Inverting/Non-Inverting
Propagation Delay Time :
16 ns at 5 V
Supply Voltage - Max :
6 V
Supply Voltage - Min :
2 V

Descrição

Flip Flops DUAL J-K W/NEG-EDGE

Preço e Aquisição

Produto Associado

  • Xilinx
    CPLD - Complex Programmable Logic Devices XC2C256-6VQG100C
  • Xilinx
    CPLD - Complex Programmable Logic Devices XC2C256-6TQG144C
  • Xilinx
    CPLD - Complex Programmable Logic Devices 3.3V 36-mc CPLD
  • Xilinx
    CPLD - Complex Programmable Logic Devices XC2C32A-6VQG44C
  • Xilinx
    CPLD - Complex Programmable Logic Devices 3.3V 72-mc CPLD
  • Xilinx
    CPLD - Complex Programmable Logic Devices XC2C64A-7VQG44C
  • Xilinx
    CPLD - Complex Programmable Logic Devices 3.3V 72-mc CPLD
  • Xilinx
    CPLD - Complex Programmable Logic Devices XC2C64A-7VQG44I
  • STMicroelectronics
    Microprocessors - MPU MPU ARM926 Cortex 8-ch DMA 32KB Rom
  • STMicroelectronics
    Embedded - CPLDs (Complex Programmable Logic Devices)

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